Other Technologies Available for Licensing
Antifuse Structures with Improved Manufacturability
U.S. Patent 5,831,325
During the fabrication of this new antifuse structure, the antifuse layer and bottom electrode are not exposed to any harmful processing environment. The three major components of the antifuse - the bottom electrode, the antifuse layer and the top buffer layer - are formed consecutively without any photolithography or etching step in-between. This antifuse structure can substantially improve the antifuse yield.
Multi-Level Storage Capacitor Structure with Improved Memory Density
U.S. Patent 5,712,813
DRAM structure using multi-level stacked capacitor is disclosed. The stacked capacitor could be either planar or three-dimensional (e.g. cylindrical or fin-shaped). The storage capacitors of adjacent DRAM cells are built at different levels and overlap each other. As a result, more capacitor area can be obtained with a fixed cell area. CMP technique can further facilitate implementation of this technology.


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