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Improving IC Yield with Protective Ceramics

  
 At a Glance

As gate oxide thicknesses approach their useful limit, new materials are being researched to replace silicon oxide. The two most favored candidates, tantalum oxide and titanium oxide, have high defect densities intrinsic to them. Protective ceramics have greater potential, since they can be made into thin films with low defect densities. Here, some metal oxides are evaluated according to their Pilling-Bedworth ratio for suitability as gate dielectric materials.

Many capacitor-like structures are used in ICs, including the MOSFET gate, DRAM storage capacitor, antifuses in programmable devices and Josephson junctions in superconductive circuits. One thing these capacitor-like structures have in common is a thin insulating material. The quality of this material is critical to the IC yield. To date, silicon oxide is the most popular thin insulating material. In current state-of-the-art technology, silicon oxide could be as thin as 3 nm, which is very close to the theoretical limit of its usefulness (~2.6 nm).1 A great deal of effort has been spent to identify alternative insulating materials.

To ensure a high yield, the insulating material has to satisfy at least one constraint: it has to have a low defect density. Protective ceramic materials can satisfy this constraint.

Protective ceramics

In physical metallurgy, a set of guidelines was developed to identify protective ceramic coatings.3 They provide corrosion protection for an underlying metal surface. They should have few pinholes and thus provide dense coverage. These attributes are exactly what the IC industry needs for insulating materials. In most cases, these protective ceramics are insulating, so guidelines developed for protective ceramic coatings in physical metallurgy can be applied equally to protective insulating ceramics in the IC industry.2 Ceramics are chemical compounds containing at least one metallic element and at least one of these five nonmetallic elements: carbon, nitrogen, oxygen, phosphorus and sulfur. Ceramics can have either polycrystalline or amorphous structure (amorphous ceramics are also referred to as glass). They are refractory and can withstand a harsh processing environment.

As the most commonly encountered ceramic, metal oxide will be used here to illustrate how to identify a protective ceramic. To identify a protective metal oxide, the Pilling-Bedworth ratio, R, is a valuable figure of merit.3 The Pilling-Bedworth ratio for a metal oxide is defined as the ratio of the volume of the metal oxide, which is produced by the reaction of metal and oxygen, to the metal volume consumed. It is given by

 

 


1. The Pilling-Bedworth ratio, R, for an oxide indicates its potential as a thin film material. (a) For, R<1, the film tends to be porous if it experiences volume shrinkage during film growth. (b) For 1<R<2, it has a much better coverage. (c) For R>2, large volume expansion accompanies oxide growth, and cracks can develop due to large compressive stress.

where M and D are the molecular weight and density of the metal oxide whose composition is(metal)a(oxygen)b, and m and d are the atomic weight and density of the metal. The general nature of the Pilling-Bedworth ratio, R, to predict the intrinsic protective nature of a metal oxide is illustrated in Figure 1. The Table gives the Pilling-Bedworth ratio for various metal oxides. The intrinsically protective oxides in the left column of the Table have the potential to be protective, but protectiveness is not guaranteed. Extrinsic factors such as manufacturing process can affect the defect density. On the other hand, metal oxides in the right column of the Table will have a large defect density no matter how much effort is made to optimize the manufacturing process.

From the Table, the intrinsic protective oxides generally have a Pilling-Bedworth ratio R larger than one and preferably less than two. For a Pilling-Bedworth ratio smaller than one, the metal oxide tends to be porous and non-protective, because it cannot cover the whole metal surface. For a Pilling-Bedworth ratio much larger than one, large compressive stresses are likely to exist in metal oxide, which would lead to it bulking and spalling. Other factors, in addition to R, also should be favorable to produce a protective oxide. Similar coefficients of thermal expansion and good adherence between metal oxide and metal are two of these factors.

Pilling-Bedworth Ratios of Various Metal Oxides
Intrinsic protective oxides Non-protective oxides
Be 1.59 K 0.45
Cu 1.68 Ag 1.59
Al 1.28 Cd 1.21
Cr 1.99 Ti 1.95
Mn 1.79 Mo 3.40
Fe 1.77 Hf 2.61
Co 1.99 Sb 2.35
Ni 1.52 W 3.40
Pd 1.60 Ta 2.33
Pb 1.40 U 3.05
Ce 1.16 V 3.18

The list of intrinsic protective metal oxides includes the oxides of Be, Cu, Al, Cr, Mn, Fe, Co, Ni, Pd, Pb and Ce. They may be suitable insulating materials. On the other hand, contrary to common belief, a few familiar metal oxides ¨C those of Ti, Ta, Mo, W ¨C are non-protective. This is probably the reason why these oxides cannot be successfully used in commercial products after years of research.

As a rule of thumb, a protective metal oxide should be formed from a metal that can stay stable in air. If its oxide has pinholes and cannot densely cover its surface, this metal can be corroded in air. For example, Cr oxide is an excellent protective metal oxide, considering its role in stainless steels.

Possible manufacturing process

In addition to having a favorable Pilling-Bedworth ratio, matched thermal expansion properties and good adherence, care must be taken in the manufacturing process to avoid the introduction of defects. For example, Si oxide, probably the most ideal protective oxide, can still exhibit high defect density if not processed "correctly."4 Protective metal oxides can be formed by various growth or deposition methods. Growth methods incorporate at least one of the non-metallic elements (C, N, O, P, S) into the surface of the bottom electrode during the oxide growth. The metal oxide is formed in the bottom electrode selectively. Examples include thermal oxidation, plasma oxidation, anodization and implantation. On the other hand, deposition methods form oxide outside the bottom electrode as well as on it. These methods include direct sputtering, reactive sputtering and CVD. It is preferred to form at least a portion of the insulating material using a growth method.

Using chromium oxide as an example, these methods are briefly described below:

Thermal oxidation. Oxide is formed on a chromium surface in an oxygen ambient at an elevated temperature.

Plasma oxidation. With an oxygen plasma ambient, oxygen ions in the plasma have a better chance to react with Cr. This leads to a faster oxidation process, even at a lower temperature.5

Anodization. Methods include gaseous, aqueous and solid-state anodization. For gaseous anodization, a glow discharge of oxygen is initiated; then a bias is applied on the Cr surface with respect to the oxygen glow discharge. Oxygen ions are accelerated towards the Cr surface and can penetrate the existing Cr oxide layer to react with the underlying Cr. This will result in a faster oxidation.6

Implantation. Oxygen is implanted into the Cr surface, followed by a thermal anneal, during which the implanted oxygen reacts with Cr.7

Direct sputtering. Cr oxide is sputtered in an argon ambient using chromium oxide target. Hydrogen can be introduced into the deposition chamber during sputtering to reduce dangling bond density.

Reactive sputtering. A chromium target is used, and is sputtered in a mixed ambient of argon and oxygen ions (optionally with hydrogen). The sputtered chromium reacts with oxygen ions on the way to the substrate to form chromium oxide.

Chemical vapor deposition (CVD). Precursor gases are introduced into the reaction chamber, and different species of ions react with each other to form chromium oxide.

Another way to improve the oxide quality is to use multiple stacked oxide layers. Each oxide layer can be comprised of different materials, or the same material formed by different methods.8 For example, silicon oxide can be used as the first half of the insulating layer and chromium oxide as the second half; or, a chromium oxide layer can be formed by thermal oxidation first, followed by a CVD method. Using stacked layers can result in a better oxide uniformity.8

Summary

Protective ceramics are proposed as a replacement to silicon oxide for insulating layers. The minimum requirement for a ceramic to be protective is a Pilling-Bedworth ratio larger than one and preferably smaller than two. Manufacturing process is an important factor in ensuring the low defect density required to make the layer protective. Stacked layers of these ceramics can further improve the dielectric quality. Besides being used as the gate insulator material in MOSFETs, protective ceramics can be used in other capacitor-like structures, such as the insulating material in storage capacitor of DRAM, the antifuse material in FPGAs and PROMs, and the tunneling material in the Josephson junction of superconductive circuits. •

G. Zhang received his Ph.D. from University of California at Berkeley in 1995. He did extensive work in IC devices, including antifuse and semiconductor memory. He holds five U.S. patents, including one for three-dimensional read-only memory (3D-ROM).
P.O. Box 9562, Berkeley, CA 94709-0562
Tel: 1-714-914-8718
Fax: 1-714-544-9250
e-mail: guobiao_zhang@hotmail.com
Web: http://sites.netscape.net/zhangpatents

REFERENCES
  1. DiMaria et al, "Reliability Projection for Ultra-Thin Oxides at Low Voltage," Technical Digest of 1998 International Electron Device Meeting, pp. 167-70, Dec. 1998.
  2. Zhang, "Applications of Protective Ceramics," U.S. Patent 5,838,530, Nov. 17, 1998. The protective ceramics disclosed herein are a preferred embodiment of the above patent. It cannot be construed as a limitation to the scope of said patent. More information on the protective ceramics is available at http://sites.netscape.net/zhangpatents.
  3. Shackelford, Introduction of Materials Science for Engineers, 2nd Edition, pp.609-610.
  4. Gibson et al, "Direct Evidence of 1 nm Pores in Dry' Thermal SiO2 from High Resolution Transmission Electron Microscopy," Journal of Electrochemical Society, Vol. 127, No. 12, pp. 2722-2728, Dec. 1980.
  5. Masui et al, "Plasma Oxidation of Cu, Ti and Ni and Photoelectrochemical Properties of the Oxide Layers Formed," Materials Chemistry and Physics, Vol. 43, No. 3, pp. 283-6, 1996.
  6. Schabowska et al, "Electrical Conduction in MIM Sandwich Structures with Al2O3 Insulating Layers," Thin Solid Films, Vol. 75, pp. 177-180, 1981.
  7. King et al, "Sub-5nm Multiple-Thickness Gate Oxide Technology Using Oxygen Implantation," Technical Digest of 1998 International Electron Device Meeting, pp. 585-588, Dec. 1998.
  8. Zhang et al, "Metal-to-Metal Antifuses with Very Thin Silicon Dioxide Films," IEEE Electron Device Letters, Vol. 15, No. 8, pp. 310-2, Aug. 1994.


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